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INTEGRATED CIRCUITS
DATA SHEET
TDA9861 Universal HiFi audio processor for TV
Preliminary specification File under Integrated Circuits, IC02 June 1994
Philips Semiconductors
Preliminary specification
Universal HiFi audio processor for TV
FEATURES * Multi-source selector switches six AF inputs (three stereo sources or six mono sources) * Each of the input signals can be switched to each of the outputs (crossbar switch) * Outputs for loudspeaker channel, headphone channel and peri-TV connector (SCART) * Switchable spatial stereo and pseudo stereo effects * Audio surround decoder can be added externally * Two general purpose logic output ports * I2C-bus control of all functions. QUICK REFERENCE DATA SYMBOL VP IP Vi Vo Gv PARAMETER positive supply voltage (pin 6) supply current input signal levels for 0 dB gain (RMS value) output signal levels for 0 dB gain (RMS value) gain in main channel volume control (1 dB steps, balance included) bass control (1.5 dB steps) treble control (3 dB steps) gain in headphone channel volume control (2 dB steps) gain for muting in all channels THD S/N Tamb total harmonic distortion signal-to-noise ratio operating ambient temperature -54 -80 - - 0 - - 0.1 85 - +16 - - - +70 -63 -12 -12 - - - +15 +15 +12 7.2 - 2 2 MIN. 8.0 25 - - TYP. 8.8 - - - MAX. GENERAL DESCRIPTION
TDA9861
The TDA9861 provides control facilities for the main, the headphone and the SCART channel of a TV set. Due to extended switching possibilities, signals from 3 stereo sources can be handled.
UNIT V mA V V
dB dB dB dB dB % dB C
ORDERING INFORMATION EXTENDED TYPE NUMBER TDA9861 Note 1. SOT232-1; 1996 December 10. PACKAGE PINS 32 PIN POSITION SDIL MATERIAL plastic CODE SOT232(1)
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Philips Semiconductors
Preliminary specification
Universal HiFi audio processor for TV
TDA9861
June 1994
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Fig.1 Block diagram and application circuit.
Philips Semiconductors
Preliminary specification
Universal HiFi audio processor for TV
PINNING SYMBOL Vi 3 P1 Vi 5 CSMO Vi 6 VP Vo 6 GND Vo 2 Vi 8 CBR1 CBR2 Vo 8 CTR Vo 4 SCL SDA Vo 3 CTL Vo 7 CBL2 CBL1 Vi 7 Vo 1 MAD Vo 5 CPS2 Vi 1 CPS1 Vi 2 P2 Vi 4 PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 port 1 output MAIN input signal LEFT smoothing capacitor of reference voltage MAIN input signal RIGHT positive supply voltage SCART output signal RIGHT ground MAIN output signal RIGHT input signal RIGHT to loudspeaker channel bass capacitor RIGHT 1 bass capacitor RIGHT 2 headphone output signal RIGHT treble capacitor RIGHT loudspeaker channel output signal RIGHT I2C-bus clock line I2C-bus data line loudspeaker channel output signal LEFT treble capacitor LEFT headphone output signal LEFT bass capacitor LEFT 2 bass capacitor LEFT 1 input signal LEFT to loudspeaker channel MAIN output signal LEFT module address select input SCART output signal LEFT pseudo stereo capacitor 2 AUX input signal LEFT pseudo stereo capacitor 1 AUX input signal RIGHT port 2 output SCART input signal RIGHT DESCRIPTION SCART input signal LEFT
TDA9861
Fig.2 Pin configuration.
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Philips Semiconductors
Preliminary specification
Universal HiFi audio processor for TV
FUNCTIONAL DESCRIPTION The TDA9861 consists of the following functions: * source select switching block * loudspeaker channel with effect controls * headphone channel * two port outputs for general purpose * I2C-bus control Source select switching block The TDA9861 selects and switches the input signals from three stereo or six mono sources as there are MAIN, AUX and SCART (Fig.1) to one of the outputs SCART, loudspeaker and headphone (crossbar-switching Table 3). Due to the fact, that the main channel (LINE outputs) is looped outside the circuit (from pins 9 and 24 to pins 10 and 23), signals can be used as LINE output or to insert a `surround sound decoder'. Loudspeaker channel Volume control is divided into the parts volume 1 and volume 2 / balance. The first part (55 dB) controls left and right channels simultaneously; the second part (23 dB)
TDA9861
controls volume and balance of left and right channels independently. Treble control provides a control range from -12 to +12 dB and bass control from -12 to +15 dB. Extended bass control can be provided by an external T-network (Fig.1) from -15 to +19 dB (2 dB steps). Effect controls `Linear stereo', `stereo with spatial effect (30% or 52% anti-phase crosstalk)' and `forced mono with or without pseudo-stereo effect' are controlled by three bits. A muting of 85 dB is provided. Headphone channel The headphone channel is only equipped with volume / balance control. A muting of 85 dB is provided. I2C-bus control All settings of control are stored in subaddress registers. Data transmission is simplified by auto-incrementing the subaddresses. The on-chip power on reset sets the mute bit to active, so all 3 stereo outputs are muted. The muting can be switched off by writing a `0' (non-muted) into the mute control bits.
LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL VP Vn IO PARAMETER supply voltage (pin 6) voltage on all pins, ground excluded output current at pins 15, 18, 13, 20, 7 and 26 at pins 2 and 31 Ptot Tstg Tamb VESD total power dissipation storage temperature operating ambient temperature electrostatic handling for all pins (note 1) electrostatic handling for all pins (note 2) Notes to the Limiting Values 1. Equivalent to discharging a 200 pF capacitor through a 0 series resistor. 2. Equivalent to discharging a 100 pF capacitor through a 1.5 k series resistor. THERMAL RESISTANCE SYMBOL Rth j-a June 1994 PARAMETER from junction to ambient in free air 5 THERMAL RESISTANCE 60 K/W - - - -25 0 - - 2.5 1.5 850 +150 +70 300 2000 mA mA mW C C V V 0 0 MIN. 10 VP MAX. V V UNIT
Philips Semiconductors
Preliminary specification
Universal HiFi audio processor for TV
TDA9861
CHARACTERISTICS VP = 8 V; Tamb = +25 C; treble and bass in linear positions; balance in mid position; spatial function, pseudo-stereo function and forced-mono function in off position and measurements taken in Fig.1 unless otherwise specified. SYMBOL VP IP Vref V4 Vi VO VC PARAMETER supply voltage (pin 6) supply current (pin 6) internal reference voltage voltage (pin 4) DC input voltage (pins 1, 3, 5, 10, 23, 28, 30 and 32) DC output voltage (pins 7, 9, 13, 15, 18, 20, 24 and 26) DC voltage on capacitors (pins 11, 12, 14, 19, 21, 22, 27 and 29) THD 0.5% on output pins -0.5 dB THD 0.5% CONDITIONS MIN. 7.2 - - - - - - TYP. 8.0 25 VP/2 MAX. 8.8 - - UNIT V mA V V V V V
VP - 0.1 - VP/2 VP/2 VP/2 - - -
DC voltage on pins
Audio select switch. Line, SCART and headphone outputs (controlled via I2C-bus, Table 3) Vi Ri f Vo RL maximum AF input signal on pins 1, 3, 5, 28, 30, 32 (RMS value) input resistance (pins 1, 3, 5, 28, 30, 32) frequency response for all AF outputs maximum AF output signal on pins 7, 9, 24, 26 (RMS value) allowed external load resistance on output (pins 9 and 24) on output (pins 7 and 26) Gv cr gain for all signal arms switch crosstalk on outputs between AF inputs at f = 10 kHz unused inputs connected to ground 10 5 - - - - 0 90 - - - - k k dB dB 2 20 20 2 - 30 - - - 40 - V k V
20000 Hz
LOUDSPEAKER CHANNEL (controlled via I2C-bus, Table 3) Volume control 1 (LEFT and RIGHT simultaneously) f = 1 kHz, 55 steps Vi Ri Gv Gv maximum input signal (RMS value; pins 10 and 23) input resistance (pins 10 and 23) nominal volume control minimum volume control step width gain set error Gv = -32 to +15 dB Gv = -40 to -33 dB Gv = -32 to +15 dB Gv = -40 to -33 dB Gv = 0; THD 0.5% on output pins 15 and 18 2 7.5 -40 -38 0.5 0.25 - - - 10 - - 1.0 1.0 - - - - +15 +14 1.5 1.75 1 2 V k dB dB dB dB dB dB
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Philips Semiconductors
Preliminary specification
Universal HiFi audio processor for TV
TDA9861
SYMBOL
PARAMETER
CONDITIONS f = 1 kHz, 24 steps
MIN. -24 -23 -80 0.5 - - -
TYP.
MAX.
UNIT
Volume 2 / balance control Gv nominal volume control minimum volume control gain in mute position Gv step width gain tracking error Bass control Gv controllable bass maximum boost maximum attenuation Gv Gv step width controllable enhanced bass maximum boost maximum attenuation Gv Gv step width Treble control controllable treble maximum boost maximum attenuation Gv spat1 spat2 phase shift by pseudo-stereo Loudspeaker channel outputs (pins 15 and 18) Vo V15, 18 maximum output signal (RMS value; pins 15 and 18) maximum DC offset voltage for volume control for bass control for treble control Ro RL CL output resistance (pins 15 and 18) allowed output load resistor allowed output load capacitor step width (resolution) Effect controls anti-phase crosstalk by spatial effect
0 -1 - 1.5 2
dB dB dB dB dB
-85 1.0 -
CB = 33 nF f = 40 Hz f = 40 Hz Fig.1 f = 60 Hz f = 60 Hz 18 14 1 19 15 2 20 16 3 dB dB dB 14 11 1 15 12 1.5 16 13 2 dB dB dB
f = 15 kHz f = 15 kHz
11 11 2.5 - - -
12 12 3
13 13 3.5 - - - -
dB dB dB
52 30 Fig.3 -
% %
THD 0.5%; RL > 10 k; CL < 1.5 nF Gv = 0 to +15 dB/mute Gv = -64 to 0 dB/mute Gv = 0 to +15 dB/mute Gv = -12 to 0 dB/mute Gv = -12 to +12 dB/mute
2
V
between adjoining step and any step to mute - - - - - - 10 - 2 0.5 2 0.5 0.5 - - - 15 10 15 10 10 100 - 1.5 mV mV mV mV mV k nF
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Philips Semiconductors
Preliminary specification
Universal HiFi audio processor for TV
TDA9861
SYMBOL VN(W)
PARAMETER weighted noise voltage at output (quasi-peak level) for +15 dB gain for 0 dB gain for -40 dB gain for mute position
CONDITIONS CCIR468-3
MIN.
TYP.
MAX.
UNIT
- - - Gv = -80 dB -1 dB f = 20 to 12500 Hz Gv = -30 to + 15 dB Gv = -30 to 0 dB Gv = -30 to -6 dB f = 10 kHz; Gv = 0 dB; opposite input grounded by 1 k resistor Gv = 0 dB; note 1 Gv = 0 dB; VR < 200 mV RMS - - - - - -
102 32 27 20 20 to 20000 0.1 0.1 0.1 75
- - - - -
V V V V Hz
B THD
AF bandwidth total harmonic distortion for Vi = 0.2 V (RMS value) for Vi = 1 V (RMS value) for Vi = 2 V (RMS value)
0.3 0.3 0.3 -
% % % dB
sp
stereo channel separation
bus RR100
crosstalk of I2C-bus ripple rejection with 100 Hz ripple on VP
- -
100 55
- -
dB dB
HEADPHONE CHANNEL (controlled via I2C-bus, Table 3) Volume control headphone channel Gv nominal volume control minimum volume control gain in mute position Gv step width (resolution) gain set error V13, 20 DC offset voltage Gv = -36 to +16 dB Gv = -54 to -36 dB Gv = -36 to +16 dB Gv = -54 to +36 dB for adjoining step and any step to mute Gv = 0 to +16 dB/mute Gv = -54 to 0 dB/mute Headphone channel output (pins 13 and 20) Vo Ro RL CL maximum output signal (RMS value) output resistance allowed output load resistor allowed output load capacitor THD 0.5%; RL > 10 k; CL < 1.5 nF 2 - 10
-
f = 1 kHz, 36 steps -54 -51 -80 1.5 1 - - - - -85 2 2 - - +16 -1 - 2.5 3 1 3 dB dB dB dB dB dB dB
- -
2 0.5 - - - -
15 10 - 100 - 1.5
mV mV
V k nF
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Philips Semiconductors
Preliminary specification
Universal HiFi audio processor for TV
TDA9861
SYMBOL VN(W)
PARAMETER for +16 dB gain for 0 dB gain for -16 dB gain for mute position
CONDITIONS
MIN. - - -
TYP. 115 20 15 12 20 to 20000 0.08 75
MAX. - - - - -
UNIT V V V V Hz
weighted noise voltage at output (quasi-peak level) CCIR468-3
Gv = -80 dB -1 dB f = 20 to 12500 Hz Gv = -40 to 0 dB f = 10 kHz; Gv = 0 dB; opposite input grounded by 1 k resistor Gv = 0 dB; note 1 Gv = 0 dB; VR < 200 mV RMS THD 0.5%; RL > 5 k
- -
B THD sp
AF bandwidth total harmonic distortion for Vi = 1 V (RMS value) stereo channel separation
- -
0.25 -
% dB
bus RR100
crosstalk of I2C-bus ripple rejection with 100 Hz ripple on VP
- -
100 55
- -
dB dB
SCART output (pins 7 and 26) Vo RL VPONR maximum output signal (RMS value) admissible output load resistor 2 5 - - - - V k
Power on reset increasing supply voltage start of reset end of reset VPONR decreasing supply voltage start of reset I2C-bus, SCL and SDA (pins 16 and 17, observe I2C-bus specification) V16, 17 I16, 17 VACK VIL VIH VOL I2, 31 input voltage HIGH-level input voltage LOW-level input current output voltage at acknowledge (pin 17) I17 = -3 mA 3 0 - - - - - - - - - - VP 1.5 10 0.4 V V A V - 5.2 4.4 - 6.0 5.2 2.5 6.8 6.0 V V V
Module address (pin 25) LOW level input voltage HIGH level output voltage 0 3 - - 1.5 VP 0.3 1 V V
Port outputs P1 and P2 (open-collector outputs pins 2 and 31) LOW level output voltage port output current I2, 31 = 1 mA (sink) sink current V mA
Note to the characteristics 1. bus = 20 log Vbus / Vo (Vbus = spurious bus signal voltage on AF output pin).
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Philips Semiconductors
Preliminary specification
Universal HiFi audio processor for TV
I2C-BUS FORMAT S S SLAVE ADDRESS A SUBADDRESS DATA P SLAVE ADDRESS A SUBADDRESS A DATA
TDA9861
P
= start condition = 1000 0000 (V25 = LOW) or 1000 0010 (V25 = HIGH) = acknowledge, generated by the slave or by the master = subaddress byte, see Table 1 = data byte, see Table 1 = stop condition
This circuit only operates as a slave transmitter. If more than 1 byte of DATA is transmitted, then auto-increment of the subaddress is performed. Byte organisation Table 1 I2C-bus transmission. DATA FUNCTION loudspeaker channel volume control both volume/balance left volume/balance right bass control byte treble control byte headphone channel volume control left volume control right 0000 0101 0000 0110 05 06 0 0 0 0 VHL5 VHR5 VHL4 VHR4 VHL3 VHR3 VHL2 VHR2 VHL1 VHR1 VHL0 VHR0 0000 0000 0000 0001 0000 0010 0000 0011 0000 0100 00 01 02 03 04 0 0 0 0 0 0 0 0 0 0 V05 0 0 0 0 V04 VL4 VR4 BA4 0 V03 VL3 VR3 BA3 TR3 V02 VL2 VR2 BA2 TR2 V01 VL1 VR1 BA1 TR1 V00 VL0 VR0 BA0 TR0 SUBADDRESS HEX D7 D6 D5 D4 D3 D2 D1 D0
switching control byte headphone output SCART output loudspeaker output 0000 0111 0000 1000 0000 1001 07 08 09 0 0 EF2 MU0 MU1 MU2 0 P1 EF1 0 P2 ST I03 I13 I23 I02 I12 I22 I01 I11 I21 I00 I10 I20
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Philips Semiconductors
Preliminary specification
Universal HiFi audio processor for TV
Table 2 Bits of data bytes. DESCRIPTION volume control common for loudspeaker channel volume control LEFT for loudspeaker channel volume control RIGHT for loudspeaker channel bass control for LEFT and RIGHT loudspeaker channel treble control for LEFT and RIGHT loudspeaker channel volume control LEFT for headphone channel volume control RIGHT for headphone channel input selection for headphone channel input selection for SCART channel input selection for loudspeaker channel mute control bits: 0 = non-muted; 1 = muted special mode control bits control bits for ports P1 (pin 2) and P2 (pin 31); output levels: 0 = LOW; 1 = HIGH
TDA9861
FUNCTION OF THE BITS IN TABLE 1 V00 to V05 VL0 to VL4 VR0 to VR4 BA0 to BA4 TR0 to TR3 VHL0 to VHL5 VHR0 to VHR5 I00 to I03 I10 to I13 I20 to I23 MU0, MU1 and MU2 EF1, EF2 and ST P1 and P2 Table 3
Output and input selection by subaddress bytes 07, 08 and 09.
OUTPUT AND INPUT CONTROL BYTES, MUTE INCLUDED (EFFECTS TABLE 4) SELECT OUTPUT PINS Loudspeaker channels output pin 18 output pin 15 09 EF2 MU2 EF1 ST I23 I22 I21 I20 INPUT GROUP INPUT SIGNAL ADDR DATA BYTE TO SUBADDRESS
SCART channels output pin 26 output pin 7 08 0 MU1 P1 P2 I13 I12 I11 I10
headphone channels output pin 20 output pin 13 07 HEX AUX LEFT AUX RIGHT AUX STEREO SCART LEFT SCART RIGHT SCART STEREO MAIN LEFT MAIN RIGHT MAIN STEREO Vi 1 Vi 2 Vi 3 Vi 4 XB X9 XA X5 X X X X X X X X X 0 0 0 0 0 0 0 0 0 0 MU0 0 0 I03 I02 I01 I00 SELECT INPUT SIGNAL PINS 28 30 28 1 32 1 3 5 3 Note 1. X = don't care 28 30 30 1 32 32 3 5 5
BITS OF DATA BYTE X X X X X X X X X X X X X X X X X X 1 1 0 1 0 0 1 1 1 0 0 1 0 1 1 1 1 0 1 0 1 1 0 1 0 0 0 1 1 1 0 1 0 0 1 0
Vi 1 and Vi 2 X7
Vi 3 and Vi 4 X6 Vi 5 Vi 6 XC XD
Vi 5 and Vi 6 X8
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Philips Semiconductors
Preliminary specification
Universal HiFi audio processor for TV
Table 4 Effect controls.
TDA9861
DATA BYTE TO SUBADDRESS 09 SETTING SPECIAL MODES stereo with spatial (52%) stereo with spatial (30%) stereo without spatial forced mono with pseudo stereo forced mono without pseudo stereo Table 5 Gv (dB) 0 -1 -2 -3 -4 -5 -6 -7 -8 -9 -10 -11 -12 -13 -14 -15 -16 -17 -18 -19 -20 -21 -22 -23 mute left HEX 1F 1E 1D 1C 1B 1A 19 18 17 16 15 14 13 12 11 10 0F 0E 0D 0C 0B 0A 09 08 07 VL4 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 Volume 2 / balance control LEFT. DATA VL3 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 VL2 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 VL1 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 VL0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 -1 -2 -3 -4 -5 -6 -7 -8 -9 -10 -11 -12 -13 -14 -15 -16 -17 -18 -19 -20 -21 -22 -23 mute right HEX EF2 BX 3X 1X 2X 0X 1 0 0 0 0 MU2 0 0 0 0 0 Table 6 Gv (dB) HEX 1F 1E 1D 1C 1B 1A 19 18 17 16 15 14 13 12 11 10 0F 0E 0D 0C 0B 0A 09 08 07 VR4 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 1 1 0 1 0 EF1 1 1 1 0 0 ST X X X X X I23 X X X X X I22 X X X X X I21 X X X X X I20
Volume 2 / balance control RIGHT. DATA VR3 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 VR2 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 VR1 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 VR0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
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Philips Semiconductors
Preliminary specification
Universal HiFi audio processor for TV
Table 7 Gv (dB) +15 +14 +13 +12 +11 +10 +9 +8 +7 +6 +5 +4 +3 +2 +1 0 -1 -2 -3 -4 -5 -6 -7 -8 -9 -10 -11 -12 -13 -14 -15 -16 HEX 3F 3E 3D 3C 3B 3A 39 38 37 36 35 34 33 32 31 30 2F 2E 2D 2C 2B 2A 29 28 27 26 25 24 23 22 21 20 V05 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 V04 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Volume 1 to control both channels. DATA V03 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 V02 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 V01 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 V00 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 Gv (dB) -17 -18 -19 -20 -21 -22 -23 -24 -25 -26 -27 -28 -29 -30 -31 -32 -33 -34 -35 -36 -37 -38 -39 -40 HEX 1F 1E 1D 1C 1B 1A 19 18 17 16 15 14 13 12 11 10 0F 0E 0D 0C 0B 0A 09 08 V05 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 V04 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 DATA V03 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1
TDA9861
V02 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0
V01 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0
V00 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0
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Philips Semiconductors
Preliminary specification
Universal HiFi audio processor for TV
Table 8 Gv (dB) +15 +13.5 +12 +10.5 +9 +7.5 +6 +4.5 +3 +1.5 0 0 -1.5 -3 -4.5 -6 -7.5 -9 -10.5 -12 HEX 19 18 17 16 15 14 13 12 11 10 0F 0E 0D 0C 0B 0A 09 08 07 06 BA4 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 Bass control LEFT and RIGHT. DATA BA3 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 BA2 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 BA1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 BA0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 +12 +9 +6 +3 0 -3 -6 -9 -12 Table 9 Gv (dB) HEX 0A 09 08 07 06 05 04 03 02 0 0 0 0 0 0 0 0 0 0
TDA9861
Treble control LEFT and RIGHT. DATA TR3 1 1 1 0 0 0 0 0 0 TR2 0 0 0 1 1 1 1 0 0 TR1 1 0 0 1 1 0 0 1 1 TR0 0 1 0 1 0 1 0 1 0
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Philips Semiconductors
Preliminary specification
Universal HiFi audio processor for TV
Table 10 Volume control of headphone LEFT. Gv (dB) +16 +14 +12 +10 +8 +6 +4 +2 0 -2 -4 -6 -8 -10 -12 -14 -16 -18 -20 -22 -24 -26 -28 -30 -32 -34 -36 -38 -40 -42 -44 -46 -48 -50 -52 -54 mute left DATA HEX VHL VHL VHL VHL VHL VHL 5 4 3 2 1 0 3F 3E 3D 3C 3B 3A 39 38 37 36 35 34 33 32 31 30 2F 2E 2D 2C 2B 2A 29 28 27 26 25 24 23 22 21 20 1F 1E 1D 1C 1B 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
TDA9861
Table 11 Volume control of headphone RIGHT. Gv (dB) +16 +14 +12 +10 +8 +6 +4 +2 0 -2 -4 -6 -8 -10 -12 -14 -16 -18 -20 -22 -24 -26 -28 -30 -32 -34 -36 -38 -40 -42 -44 -46 -48 -50 -52 -54 DATA HEX VHR VHR VHR VHR VHR VHR 5 4 3 2 1 0 3F 3E 3D 3C 3B 3A 39 38 37 36 35 34 33 32 31 30 2F 2E 2D 2C 2B 2A 29 28 27 26 25 24 23 22 21 20 1F 1E 1D 1C 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
mute right 1B
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Philips Semiconductors
Preliminary specification
Universal HiFi audio processor for TV
TDA9861
CURVE 1 2 3
CAPACITANCE AT PIN 29 (nF) 15 47 68
CAPACITANCE AT PIN 27 (nF) 15 5.6 5.6
EFFECT normal intensified more intensified
Fig.3 Pseudo (phase) as a function of frequency.
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Philips Semiconductors
Preliminary specification
Universal HiFi audio processor for TV
PACKAGE OUTLINE SDIP32: plastic shrink dual in-line package; 32 leads (400 mil)
TDA9861
SOT232-1
D seating plane
ME
A2 A
L
A1 c Z e b 32 17 b1 wM (e 1) MH
pin 1 index E
1
16
0
5 scale
10 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A max. 4.7 A1 min. 0.51 A2 max. 3.8 b 1.3 0.8 b1 0.53 0.40 c 0.32 0.23 D (1) 29.4 28.5 E (1) 9.1 8.7 e 1.778 e1 10.16 L 3.2 2.8 ME 10.7 10.2 MH 12.2 10.5 w 0.18 Z (1) max. 1.6
Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT232-1 REFERENCES IEC JEDEC EIAJ EUROPEAN PROJECTION
ISSUE DATE 92-11-17 95-02-04
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Philips Semiconductors
Preliminary specification
Universal HiFi audio processor for TV
SOLDERING Plastic dual in-line packages BY DIP OR WAVE
TDA9861
The maximum permissible temperature of the solder is 260 C; this temperature must not be in contact with the joint for more than 5 s. The total contact time of successive solder waves must not exceed 5 s. The device may be mounted up to the seating plane, but the temperature of the plastic body must not exceed the specified storage maximum. If the printed-circuit board has been preheated, forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit. REPAIRING SOLDERED JOINTS Apply the soldering iron below the seating plane (or not more than 2 mm above it). If its temperature is below 300 C it must not be in contact for more than 10 s; if between 300 and 400 C, for not more than 5 s. DEFINITIONS Data sheet status Objective specification Preliminary specification Product specification Limiting values Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of this specification is not implied. Exposure to limiting values for extended periods may affect device reliability Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. PURCHASE OF PHILIPS I2C COMPONENTS This data sheet contains target or goal specifications for product development. This data sheet contains preliminary data; supplementary data may be published later. This data sheet contains final product specifications.
Purchase of Philips I2C components conveys a license under the Philips' I2C patent to use the components in the I2C system provided the system conforms to the I2C specification defined by Philips. This specification can be ordered using the code 9398 393 40011.
June 1994
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